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Performance and Power Consumption Management Functions in Intel Pentium 4 and Intel Xeon. Part 2: New Processors, New Technologies
A week has not yet passed since the previous article was published about power consumption management technologies in modern processors, but our test lab already got hold of Intel Pentium 4 processor, and a week later – Intel Xeon with a new revision of Prescott and Nocona cores (E0 stepping, CPUID = 0F41h signature). The former demonstrated seemingly interesting behaviour in the halt mode (it will be described below). We have found out the reason soon enough – it turned out that the new revision of Prescott core supports the new Enhanced Halt State (aka C1E) technology together with Execute Disable (XD bit) and Thermal Monitor 2 (TM2). A similar operating mode and the Enhanced SpeedStep (DBS) technology for servers are also implemented in the new revision of Nocona core. The present article is devoted to the C1E technology analysis as well as to Thermal monitoring mechanism #2, which is implemented in Pentium 4/Xeon processors in new Prescott/Nocona core revisions.
Testbed configurations
Testbed 1
- CPU: 3.6 GHz Intel Pentium 4 (Prescott core, CPUID 0F41h)
- Chipset: Intel 925XE
- Motherboard: Intel D925XECV2, BIOS v1817 dated 10/12/2004
- Memory: 2x256 MB Samsung DDR2-533
- Video: Leadtek PX350 TDH, NVIDIA PCX5900
- HDD: WD Raptor WD360, SATA, 10000 rpm, 36GB
Testbed 2
- CPUs: 2x 3.6 GHz Intel Xeon (Nocona core, CPUID 0F41h)
- Chipset: Intel E7520
- Motherboard: Intel Server Board SE7250AF2, BIOS v2023 dated 08/05/2004
- Memory: 4x1024 MB Patriot Registered DDR2-533
- Video: ATI RAGE XL PCI (integrated)
- HDD: WD Raptor WD360, SATA, 10000 rpm, 36GB
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